A NAND gate is called a universal logic element because
A NAND gate is called a universal logic element because
Most of the digital computers do not have floating point hardware because
Most of the digital computers do not have floating point hardware because
In case of OR gate, no matter what the number of inputs, a
In case of OR gate, no matter what the number of inputs, a
An AND gate will function as OR if
An AND gate will function as OR if
The binary number 10101 is equivalent to decimal number ___________.
The binary number 10101 is equivalent to decimal number ___________.
Consider the representation of six-bit numbers by two’s complement, one’s complement, or by sign and magnitude: In which representation is there overflow from the addition of the integers 011000 and 011000?
Consider the representation of six-bit numbers by two’s complement, one’s complement, or by sign and magnitude: In which representation is there overflow from the addition of the integers 011000 and 011000?
Digital computers are more widely used as compared to analog computers, because they are
Digital computers are more widely used as compared to analog computers, because they are
Pick out the CORRECT statement:
Pick out the CORRECT statement:
Which of the following gate is a two-level logic gate
Which of the following gate is a two-level logic gate
NAND. gates are preferred over others because these
NAND. gates are preferred over others because these
The inputs of a NAND gate are connected together. The resulting circuit is ___________.
The inputs of a NAND gate are connected together. The resulting circuit is ___________.
The number of Boolean functions that can be generated by n variables is equal to
The number of Boolean functions that can be generated by n variables is equal to
Which is the correct order of sequence for representing the input values in K-map?
Which is the correct order of sequence for representing the input values in K-map?
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The NOR gate is OR gate followed by ___________.
The NOR gate is OR gate followed by ___________.
Assuming 8 bits for data, 1 bit for parity, I start bit and 2 stop bits, the number of characters that 1200 BPS communication line can transmit is.
Assuming 8 bits for data, 1 bit for parity, I start bit and 2 stop bits, the number of characters that 1200 BPS communication line can transmit is.
The NAND gate is AND gate followed by ___________.
The NAND gate is AND gate followed by ___________.
When an input signal 1 is applied to a NOT gate, the output is ___________.
When an input signal 1 is applied to a NOT gate, the output is ___________.
In Boolean algebra, the bar sign (-) indicates ___________.
In Boolean algebra, the bar sign (-) indicates ___________.
An OR gate has 6 inputs. The number of input words in its truth table are
An OR gate has 6 inputs. The number of input words in its truth table are
The number 10000 would appear just immediately after
The number 10000 would appear just immediately after
The binary code of (21.125)10 is
The binary code of (21.125)10 is
The only function of NOT gate is to ___________.
The only function of NOT gate is to ___________.
What is/are the configurable functions of each and every IOBs connected around the FPGA device from the operational point of view?
What is/are the configurable functions of each and every IOBs connected around the FPGA device from the operational point of view?
A hexadecimal odometer displays F 52 F. The next reading will be
A hexadecimal odometer displays F 52 F. The next reading will be
The fan put of a 7400 NAND gate is
The fan put of a 7400 NAND gate is
A debouncing circuit is
A debouncing circuit is
Storage of 1 KB means the following number of bytes
Storage of 1 KB means the following number of bytes
Digital circuit can be made by the repeated use of ___________
Digital circuit can be made by the repeated use of ___________
Excess-3 code is known as
Excess-3 code is known as
Which mechanism allocates the binary value to the states in order to reduce the cost of the combinational circuits?
Which mechanism allocates the binary value to the states in order to reduce the cost of the combinational circuits?
The inverter is ___________
The inverter is ___________
Positive logic in a logic circuit is one in which
Positive logic in a logic circuit is one in which
"What would happen, if smaller logic modules are utilized for performing logical functions associated with FPGA?
A. Propagation delay will increase
B. FPGA area will increase
C. Wastage of logic modules will not be prevented
D. Number of interconnected paths in device will decrease
"
"What would happen, if smaller logic modules are utilized for performing logical functions associated with FPGA?
A. Propagation delay will increase
B. FPGA area will increase
C. Wastage of logic modules will not be prevented
D. Number of interconnected paths in device will decrease
"
The universal gate is ___________
The universal gate is ___________
In which of the following base systems is 123 not a valid number?
In which of the following base systems is 123 not a valid number?
Which type of CPLD packaging can provide maximum number of pins on the package due to small size of the pins?
Which type of CPLD packaging can provide maximum number of pins on the package due to small size of the pins?
Among the logic families, the family which can be used at very high frequency greater than 100 MHz in a 4 bit synchronous counter is
Among the logic families, the family which can be used at very high frequency greater than 100 MHz in a 4 bit synchronous counter is
